Showing posts with label NOVEMBER/DECEMBER 2008. Seventh Semester Electronics and Communication Engineering EC-1401-VLSI DESIGN. Show all posts
Showing posts with label NOVEMBER/DECEMBER 2008. Seventh Semester Electronics and Communication Engineering EC-1401-VLSI DESIGN. Show all posts
Monday, January 31, 2011
model question paper vlsi BE/B.TECH. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2008. Seventh Semester Electronics and Communication Engineering EC-1401-VLSI DESIGN
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model question paper vlsi BE/B.TECH. DEGREE EXAMINATION,
NOVEMBER/DECEMBER 2008. Seventh Semester Electronics and Communication Engineering EC-1401-VLSI DESIGN
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BE/B.TECH. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2008.Seventh SemesterElectronics and Communication EngineeringEC-1401-VLSI DESIGN(Regulation 2004)
PART-A-(10*2=20 marks)
1.How do you prevent Latch up problem?
2.List any two types of layout design rules.
3.Define rise time and fall time.
4.Write an expression for power dissipation in CMOS inverter.
5.Differentiate between conditional and
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